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05/2005 ARA05050 reverse amplifier with step attenuator data sheet - rev 2.2 features ? low cost integrated monolothic gaas amplifier with step attenuator ? attenuation range: 0-30 db, adjustable in 2db increments via a 4 wire parallel control ? meets docsis distortion requirements at +58dbmv output signal level ? low distortion and low noise ? low signal tonoise ratio at all gain levels ? frequency range: 5-100 mhz ? 5 volt operation ? rohs-compliant package option applications ? mcns/docsis compliant cable modems ? catv interactive set-top box ? opencable set-top box ? fiber nodes ? cable modem termination systems (cmts) product description the ARA05050 is a gaas ic designed to provide the reverse path amplification and output level control functions in a catv set-top box or cable modem. it incorporates a digitally controlled precision step attenuator that is preceded by an ultra low noise amplifier stage, and followed by an ultra-linear output driver amplifier. this device is capable of meeting the mcns/docsis requirements for harmonic figure 1. cable modem or set top box application diagram s12 package 28 pin ssop with heat slug diplexer ARA05050 saw filter double- conversion tuner mac upstream qpsk/16qam modulator qam receiver with fec balun transmit enable/disable attenuation control microcontroller with ethernet mac ram rom 10base-t transceiver rj45 connector clock clock data data 54-860 mhz 44 mhz 5-42 mhz 4 lpf switch performance at a +58dbmv output level while requiring only a single polarity +5v supply. both the input and the output are single-ended and matched to 75 ohms. the precision attenuator provides up to 30 db of attenuation in 2 db increments. the ARA05050 is offered in a 28-pin ssop package that features a heat slug on the bottom of the package, and is available in a rohs-compliant option.
2 data sheet - rev 2.2 05/2005 ARA05050 figure 2: functional block diagram figure 3: pinout 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 gnd i set1 att out att acg1 rf in2 v ref1 rf out1 att in 16 db v att 8 db rf in i set2 rf out bypass 2 db n/c 4 db att acg1 att acg1 att acg1 v ref2 att acg2 att acg2 att acg2 att acg2 n/c n/c rf in rf out i set2 i set1 16 db 2 db 4 db 8 db rf in2 rf out1 att out att in a1 a2 30 db, 2db step digital attenuator section
data sheet - rev 2.2 05/2005 3 ARA05050 table 1: pin description n i p e m a n n o i t p i r c s e d n i p e m a n n o i t p i r c s e d 1c / nn o i t c e n n o c o n ) 1 ( 5 1b d 4t i b l o r t n o c n o i t u n e t t a b d 4 2s s a p y bs s a p y b l a n r e t n i6 1b d 2t i b l o r t n o c n o i t u n e t t a b d 2 3t t a n i t u p n i r o t a u n e t t a ) 2 ( 7 1d n gd n u o r g 4f r 1 t u o d n a t u p t u o 1 a r e i f i l p m a y l p p u s 8 1f r t u o d n a t u p t u o 2 a r e i f i l p m a y l p p u s 5v 1 f e r r o f e g a t l o v e c n e r e f e r 1 a r e i f i l p m a 9 1v 2 f e r r o f e g a t l o v e c n e r e f e r 2 a r e i f i l p m a 6t t a 1 g c a 1 d n u o r g c a r o t a u n e t t a ) 3 ( 0 2t t a 2 g c a 2 d n u o r g c a r o t a u n e t t a ) 3 ( 7t t a 1 g c a 1 d n u o r g c a r o t a u n e t t a ) 3 ( 1 2t t a 2 g c a 2 d n u o r g c a r o t a u n e t t a ) 3 ( 8t t a 1 g c a 1 d n u o r g c a r o t a u n e t t a ) 3 ( 2 2t t a 2 g c a 2 d n u o r g c a r o t a u n e t t a ) 3 ( 9t t a 1 g c a 1 d n u o r g c a r o t a u n e t t a ) 3 ( 3 2t t a 2 g c a 2 d n u o r g c a r o t a u n e t t a ) 3 ( 0 1f r n i t u p n i 1 a r e i f i l p m a ) 4 ( 4 2f r 2 n i t u p n i 2 a r e i f i l p m a ) 4 ( 1 1i 1 t e s t s u j d a t n e r r u c 1 a r e i f i l p m a ) 4 ( 5 2i 2 t e s t s u j d a t n e r r u c 2 a r e i f i l p m a ) 4 ( 2 1v t t a y l p p u s r o t a u n e t t a6 2t t a t u o t u p t u o r o t a u n e t t a ) 2 ( 3 1b d 6 1t i b l o r t n o c n o i t u n e t t a b d 6 17 2c / nn o i t c e n n o c o n ) 1 ( 4 1b d 8t i b l o r t n o c n o i t u n e t t a b d 2 88 2c / nn o i t c e n n o c o n ) 1 ( notes: (1) all n/c pins should be grounded. (2) pins should be ac-coupled. no external dc bias should be applied. (3) pins should be ac-grounded. no external dc bias should be applied. (4) pins should be grounded or pulled to ground through a resistor. no external dc bias should be applied.
4 data sheet - rev 2.2 05/2005 ARA05050 electrical characteristics r e t e m a r a p n i m x a m t i n u v : y l p p u s g o l a n a sup ) 8 1 , 2 1 , 4 s n i p (09c d v ) 9 1 , 5 s n i p ( s e g a t l o v e c n e r e f e r r e i f i l p m a5 . 2 - v sup 2 c d v f r s t u p n i r e i f i l p m a t a r e w o p s n i p ( 4 2 , 0 1 ) -0 6 +v m b d ) 6 1 , 5 1 , 4 1 , 3 1 s n i p ( s l o r t n o c r o t a u n e t t a06v e r u t a r e p m e t e g a r o t s5 5 -0 0 2 + o c e r u t a r e p m e t g n i r e d l o s-0 6 2 o c e m i t g n i r e d l o s-5c e s table 2: absolute minimum and maximum ratings table 3: operating ranges r e t e m a r a p n i m p y t x a m t i n u v : y l p p u s r e i f i l p m a dd ) 8 1 , 4 s n i p (5 . 457 c d v v : y l p p u s r o t a u n e t t a attn ) 2 1 n i p (v dd 5 . 0 -57 c d v ) 6 1 , 5 1 , 4 1 , 3 1 s n i p ( s l o r t n o c r o t a u n e t t a0-5 . 5v ) 9 1 , 5 s n i p ( s e g a t l o v e c n e r e f e r r e i f i l p m a-5 7 . 1-c d v e r u t a r e p m e t e s a c0 4 -5 25 8 o c stresses in excess of the absolute ratings may cause permanent damage. functional operation is not implied under these conditions. exposure to absolute ratings for extended periods of time may adversely affect reliability. the device may be operated safely over these conditions; however, parametric performance is guaranteed only over the conditions defined in the electrical specifications. notes: 1. pins 3 and 26 should be ac-coupled. no external dc bias should be applied. 2. pins 10, 11, 24 and 25 should be grounded or pulled to ground through a resistor. no external dc bias should be applied. 3. pins 6, 7, 8, 9, 20, 21, 22 and 23 should be ac-grounded. no external dc bias should be applied.
data sheet - rev 2.2 05/2005 5 ARA05050 r e t e m a r a p n i m p y t x a m t i n u ) 4 n i p ( t n e r r u c 1 a r e i f i l p m a-5 75 9a m ) 8 1 n i p ( t n e r r u c 2 a r e i f i l p m a-0 0 10 3 1a m ) 2 1 n i p ( t n e r r u c r o t a u n e t t a-8-a m n o i t p m u s n o c r e w o p l a t o t-2 9 . 02 . 1w notes: (1) see figures 5 and 6 for performance at higher frequencies. all specifications as measured in anadigics test fixture. table 4: dc electrical specifications t a =25 c; v dd , v attn = +5.0 vdc table 5: ac electrical specifications t a =25 c; v dd , v attn = +5.0 vdc r e t e m a r a p n i m p y t x a m t i n u s t n e m m o c ) z h m 0 1 ( n i a g 0 5 0 5 0 a r a r 0 5 0 5 0 a r a 0 3 1 3 2 3 2 3 3 3 3 3 b dg n i t t e s n o i t a u n e t t a b d 0 s s e n t a l f n i a g-5 7 . 05 . 1b dz h m 0 0 1 o t 5 e r u t a r e p m e t r e v o n o i t a i r a v n i a g-6 0 0 . 0 --c / b d s p e t s n o i t a u n e t t a b d 2 b d 4 b d 8 b d 6 1 6 . 1 8 . 3 0 . 8 0 . 6 1 5 8 . 1 0 . 4 3 . 8 6 . 6 1 2 . 2 2 . 4 5 . 8 0 . 7 1 b d z h m 2 4 o t 5 ) 1 ( , c i n o t o n o m 2 d n l e v e l n o i t r o t s i d c i n o m r a h z h m 5 z h m 5 2 - - 0 6 - 3 6 - 5 5 - 5 5 - c b ds m h o 5 7 o t n i v m b d 8 5 + 3 d r l e v e l n o i t r o t s i d c i n o m r a h z h m 5 z h m 5 2 - - 3 6 - 3 6 - 0 6 - 0 6 - c b ds m h o 5 7 o t n i v m b d 8 5 + 3 d r t p e c r e t n i t u p t u o r e d r o8 7-- v m b d t n i o p n o i s s e r p m o c n i a g b d 1-0 7- v m b d e r u g i f e s i o n-7 . 15 . 2b d
6 data sheet - rev 2.2 05/2005 ARA05050 r e t e m a r a p n i m p y t x a m t i n u s t n e m m o c r e w o p e s i o n t u p t u o . t e s . n e t t a . n i m / l a n g i s o n / e v i t c a . t e s . n e t t a . x a m / l a n g i s o n / e v i t c a - - - - 6 . 7 3 - 6 . 4 5 - v m b dh t d i w d n a b z h k 0 6 1 y n a z h m 2 4 o t 5 m o r f e c n a d e p m i t u p n i-5 7- s m h o s s o l n r u t e r t u p n i-0 2 -5 1 -b dm e t s y s m h o 5 7 e c n a d e p m i t u p t u o-5 7- s m h o s s o l n r u t e r t u p t u o-0 2 -5 1 -b dm e t s y s m h o 5 7 note: as measured in anadigics test fixture continued: ac electrical specifications t a =25 c; v dd , v attn = +5.0 vdc r e t e m a r a p n i m p y t x a m t i n u s t n e m m o c c i g o l l o r t n o c r o t a u n e t t a ) 1 ( v in , low v in , high 0 8 . 2 - - 5 . 0 5 . 5 v e g a t s . n e t t a s e s s a p y b e g a t s . n e t t a s e l b a n e e c n a d e p m i l o r t n o c r o t a u n e t t a-k 5- s m h o table 6: logic interface specifications t a =25 c; v dd , v attn = +5.0 vdc ( n o i t a u n e t t ad) b 02468 0 12 14 16 18 10 22 24 26 28 20 3 ) 6 1 n i p ( t u p n i c i g o l b d 2 lhlhlhlhlhlhlhlh ) 5 1 n i p ( t u p n i c i g o l b d 4 llhhllhhllhhllhh ) 4 1 n i p ( t u p n i c i g o l b d 8 llll hhhhl l l l hhhh ) 3 1 n i p ( t u p n i c i g o l b d 6 1 llllllllhh hhhhhh note: ?l? = logic low, ?h? = logic high table 7: attenuator logic note: (1) specification applies when 470 ohm resistor is connected from pin 2 to ground (see test circuit in figure 4).
data sheet - rev 2.2 05/2005 7 ARA05050 figure 4: test circuit 227 16 15 1 14 22 24 25 23 21 20 19 18 17 28 26 9 8 7 10 6 11 5 12 4 13 3 gnd i set1 att acg1 rf out1 att in v att 16 db 8 db 4 db i set2 rf in2 2 db rf in n/c att out v ref1 rf out att acg1 att acg1 att acg1 v ref2 att acg2 att acg2 att acg2 att acg2 bypass n/c n/c (75 ohms) 0.1uf rf output (75 ohms) 3.9 ohms 8 db 16 db +5 v rf input +5 v 620 ohms 0.1uf 0.01uf 1uf 0.01uf ARA05050 10uh 0.01uf 1uf 620 ohms 2 db 4 db 20 ohms 1uf 0.1uf 0.1uf 1pf 3.3k ohms 1.8k ohms 1uf 5k ohms 0.01uf 1uf 0.1uf 5k ohms +5 v 1uf 0.01uf 10uh 20 ohms 3.3k ohms 1.8k ohms 1uf 0.1uf 0.1uf 470 ohms (see note) note: the 470 ohm resistor from pin 2 to ground is installed for 3v attenuator control logic levels. for 5v logic, the 470 ohm resistor is removed.
8 data sheet - rev 2.2 05/2005 ARA05050 performance data figure 5: s21 (0 - 16 db attenuation) figure 7: s11 - log scale figure 8: s22 - log scale figure 9: s11 - smith chart figure 10: s22 - smith chart figure 6: s21 (16 - 30 db attenuation)
data sheet - rev 2.2 05/2005 9 ARA05050 figure 12: harmonic performance figure 11: attenuator switching speed - 16 db step
10 data sheet - rev 2.2 05/2005 ARA05050 application information printed circuit board layout considerations the ARA05050 is a high-performance rf device. special consideration must be given to certain features of the the printed circuit board layout, as they can affect the rf performance of the ic. refer to the anadigics application note ?catv reverse amp w/ step attenuator? for more details. amplifier enable / disable the ARA05050 includes two amplification stages that each can be shut down through external control pins v ref 1 and v ref 2 (pins 5 and 19, respectively.) by applying a typical bias of 1.75 volts to these pins, the amplifiers are enabled. in order to fully disable an amplifier, its control pin requires a negative bias of -1.5 to -2.0 volts. amplifier bias current the i set pins (11 and 25) set the bias current for the amplification stages. grounding these pins results in the maximum possible current. by placing a resistor from the pin to ground, the current can be reduced. the recommended bias conditions use the configuration shown in the test circuit schematic in figure 4. thermal layout considerations the device package for the ARA05050 features a heat slug on the bottom of the package body. use of the heat slug is an integral part of the device design. soldering it to the ground plane of the pc board will ensure the lowest possible thermal resistance for the device, and will result in the longest mtf (mean time to failure.) a pc board layout that optimizes the benefits of the heat slug is shown in figure 13. the via holes located under the body of the device must be plated through to a ground plane layer of metal, in order to provide sufficient thermal conductivity. the recommended solder mask outline is shown in figure 14. esd sensitivity electrostatic discharges can cause permanent damage to this device. electrostatic charges accumulate on test equipment and the human body, and can discharge without detection. proper precautions and handling are strongly recommended. refer to the anadigics application note on esd precautions. figure 13: pc board layout
data sheet - rev 2.2 05/2005 11 ARA05050 figure 14: solder mask outline
12 data sheet - rev 2.2 05/2005 ARA05050 figure 15: s12 package outline - 28 pin ssop with heat slug package outline
data sheet - rev 2.2 05/2005 13 ARA05050 component packaging figure 17: tape dimensions volume quantities of the ARA05050 are supplied on tape and reel. each reel holds 3,500 pieces. smaller quantities are available in plastic tubes of 50 pieces. figure 16: reel dimensions direction of feed
14 data sheet - rev 2.2 05/2005 ARA05050 notes
data sheet - rev 2.2 05/2005 15 ARA05050 notes
warning anadigics products are not intended for use in life support appliances, devices or systems. use of an anadigics product in any such application without written consent is prohibited. important notice anadigics, inc. 141 mount bethel road warren, new jersey 07059, u.s.a. tel: +1 (908) 668-5000 fax: +1 (908) 668-5132 url: http://www.anadigics.com e-mail: mktg@anadigics.com anadigics, inc. reserves the right to make changes to its products or to discontinue any product at any time without notice. the product specifications contained in advanced product information sheets and preliminary data sheets are subject to change prior to a product?s formal introduction. information in data sheets have been carefully checked and are assumed to be reliable; however, anadigics assumes no responsibilities for inaccuracies. anadigics strongly urges customers to verify that the information they are using is current before placing orders. data sheet - rev 2.2 05/2005 16 ARA05050 ordering information r e b m u n r e d r o e r u t a r e p m e t e g n a r e g a k c a p n o i t p i r c s e d g n i g a k c a p t n e n o p m o c r t c 2 1 s 0 5 0 5 0 a r a5 8 o t 0 4 - 0 c p o s s n i p 8 2 g u l s t a e h h t i w l e e r d n a e p a t e c e i p 0 0 5 , 3 c 2 1 s 0 5 0 5 0 a r a5 8 o t 0 4 - 0 c p o s s n i p 8 2 g u l s t a e h h t i w ) e b u t r e p s e c e i p 0 5 ( s e b u t c i t s a l p 1 p 2 1 s r 0 5 0 5 0 a r a5 8 o t 0 4 - 0 c t n a i l p m o c - s h o r p o s s n i p 8 2 g u l s t a e h h t i w l e e r d n a e p a t e c e i p 0 0 5 , 3

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